Snail Phono Pre

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little eddy
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#61

Post by little eddy »

Mike H wrote:Is the input stage 2 x parallel ECC83? See elsewhere discussion about Miller capacitance effect and of ECC83's in parallel!
....
Sorry. Forgot to say that I am only considering MC and using the currently fitted step-up TXs.
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Mike H
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#62

Post by Mike H »

Ah!! Beyond my experience. So I've no idea what'll happen.


Don't take any notice of me I'm just in one of my "what's the point of going on, nothing will ever be perfect" moods :lol:


Damn you laws of physics Image


 
 
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#63

Post by Mike H »

How about this for a radical idea:

It's based on the Richard Brice phono pre-amp front end which I've always poo-pooed in the past but I'm not so sure now.

Bluddy hell it's got a gain of X180 Image

Tried it with a CCS and got a gain of >1,000 ImageImage ....!



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little eddy
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#64

Post by little eddy »

The amp that I propose to modify has the volume pot after the line stage. What are the pros and cons?

Is this a problem since I am proposing to bias the gain stage at around 4V? Does this mean that I will be OK with an iput signal of 2.8Vrms before it starts clipping? Separately I am just trying to find out what the specification is for my dac output. I thought CD was nominally 2Vrms but seen something a few days ago where someone mentioned 3V!

Mike's previous circuit had an 'output leak' R of around 500k (as per the schematic posted on the 6th) so would replacing this with a 100k POT have any detrimental impact? With me using a CF as the output stage, would less than 100k be an issue?
TD-125/RB250/MC25FL & 'Snail' phono, NAS/SBT with CS4398 DAC, 41MP pre & MoFo Power, still messing with OBs.
little eddy
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#65

Post by little eddy »

The amp that I propose to modify has the volume pot after the line stage. What are the pros and cons?

Is this a problem since I am proposing to bias the gain stage at around 4V? Does this mean that I will be OK with an iput signal of 2.8Vrms before it starts clipping? Separately I am just trying to find out what the specification is for my dac output. I thought CD was nominally 2Vrms but seen something a few days ago where someone mentioned 3V!

Mike's previous circuit had an 'output leak' R of around 500k (as per the schematic posted on the 6th) so would replacing this with a 100k POT have any detrimental impact? With me using a CF as the output stage, would less than 100k be an issue?
TD-125/RB250/MC25FL & 'Snail' phono, NAS/SBT with CS4398 DAC, 41MP pre & MoFo Power, still messing with OBs.
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Mike H
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#66

Post by Mike H »

If it's the resistor I think you mean it's to stop a massive high Voltage pulse going into whatever follows when you plug it in. 'Cause the resistor has already charged the output cap and made sure the output is a t DC ground level.

Pros: less circuit noise. Or more accurately, proportional to pot wiper position, but then will always be some fraction of the music level.

Cons: you risk overloading the line amp or distorting it with nowt in front to control the input level.

Cons #2: the track impedance of the pot in series with the output. Unless it were something low like 10k as a maximum say.



 
 
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little eddy
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#67

Post by little eddy »

So the 4V bias on the gain stage should if my basic understanding is right, remove the risk of clipping but as you say, distortion will a result of the inherent assymetry either side of the operting point? I could always put a potential divider on the CD input which would also help equalise input levels from phono and CD but not sure in percentage terms whether this will reduce the distortion!

The last point regarding the series resistance from the pot could also be a benefit in that because I am unlikely to have the vol pot turned up to max, I could get away with removing the 1k0 output limiting R.

If I had the pot on the more conventional input side of the gain stage, any assymetry or the absolute distortion level would be multiplied by the gain stage anyway. Sounds like it is a trade-off between noise and distortion, and with the relatively low gain if I use the ECC82, with the pot having to go somewhere, I am inclinesd to leave it where it is.
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#68

Post by Mike H »

If in front, that's probably the best place IMO. Haven't seen many CF's with a vol pot after.

any assymetry or the absolute distortion level would be multiplied by the gain stage anyway
No distortion comes about as a result of amplification. Soon as it goes off the DC biased "centre point", it goes assymetric. If the source has distortion in it, you'll still get it regardless of pot level setting, or gain of the line amp. The idea is minimize the distortion of the line amp, that usually means limiting the input level. Which requires something to control it in front.

Which leaves noise, so you're right about that, so needs a nice hum-free supply line and choose your resistors carefully.

Everything is a compromise! :D



 
 
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little eddy
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#69

Post by little eddy »

Back to the phono. I've been studying MJ and now have a spreadsheet to calculate values for a split RIAA equalisation based on his ECC88 example.

However most of the recent amp schemes I've seen, even 3-stage ones have an 'all-in-one' RIAA equalisation network. Most of these RIAA schemes seem to differ slightly in topologies so is there one that would be recommended.

I've been looking for the explanations and equations for a single stage RIAA network. Found this page with a couple of different topologies: http://www.platenspeler.com/background/ ... und_4.html

Also found this but would need to take account ot the 1st stage output R and second stage inputC if I'm correct: http://www.kabusa.com/riaa.htm

Any thoughts?

Also looking at many schemes, the grid leak R on the second stage at 2 or 3 M are often much larger than the recommended max values of say 1M for a number of valves!
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#70

Post by Mike H »

Sure I mentioned this earlier, put the grid leak in front of R1 of the network, then it can be 1 Meg.

If you want separate EQ filter parts mine is based on this:

http://www.reocities.com/bobdanielak/phono.html

Though I did mod slightly, basically R2 & R7 are bypassed, R5 is moved to before R4, and R8 is 47k with bias adjusted accordingly for V2, about 105V at anode.



 
 
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little eddy
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#71

Post by little eddy »

Mike - you're 10 steps in fromt of me.

My starting point was the 'simple' phono posted on DIYaudio and I think used by Andrew as the basis for his 6072a/ECC88 phono - he at least seems to have used the majority of the RIAA network.

This is attached and the other reason for using this is that later in the thread, they talk about using parallel ECC83 valves (as suggested by Nick), and the only recommended changes is that Rl falls from 100k to 51k, and the series resistor increases from 215 to 270k. They also state that if a CCS is used, this series resistor will reduce, I presuming because Rl will increase.

My main questions really relate to the second stage because instead of using this 'grounded cathode' ECC88 running at 13.5mA, because I don't have the current capacity with the TX I have, I was going to use a CC 12ay7/6072a conventional gain stage. Without really understanding how this 'grounded cathode' output stage works, I'm struggling to calculate its miller capacitance and therefore what I might need to change in the RIAA if I emply the 12ay7 gain stage with a miller cap of around 42pF if I'm correct.

If I can't figure this out, I will have to start with a split RIAA network a la MJ but Nick did say he thought that single-stage RIAA networks in his opinion sounded better.
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#72

Post by Andrew »

That's a nice little circuit, I still listen to my incarnation of it.

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#73

Post by Andrew »

The 'grounded cathode' and high current on the second stage is to reduce output impedance of the ECC88 so it can drive difficult loads, you can safely back off the current on the ECC88, assuming you are driving a standard 100k load.

Just to complete the picture, the 88 is being run in grid leak bias, there's no free lunch, this does produce more distortion than cathode bias, the 88 settles out to about 1/2v bias, if I recall.

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little eddy
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#74

Post by little eddy »

EDIT - Is this particular RIAA circuit only applicable if using grid leak biasing in which case I shold be looking elsewhere for a starting point?

If OK to use with cathode coupled 2nd stage then if the ECC88 stage has a gain of 11 and Cag is 1.4pF, the miller cap is 15.4pF.

When using a CC 12AY7 the miller C could be 42pF so what cap or caps in the RIAA stage do I reduce and how do I calculate by how much? I guess that I could also adjust one or two of the resistors up to keep the time constant the same and caps with readily available values.

Andrew - Why did you drop the grid leak R to 3M3 from the original 10M because the only other component you altered was the first resistor which you increased to 221k (I guess because of the 6072 rather than ECC83, and the c4s). I ask because when MJ calculates the split RIAA, the grid leak of the 2nd stage is taken into account.
Last edited by little eddy on Sun Dec 19, 2010 3:43 pm, edited 1 time in total.
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#75

Post by Andrew »

little eddy wrote:So if the ECC88 stage has a gain of 11 and Cag is 1.4pF, the miller cap is 15.4pF.

If using the 12AY7 the miller C is 42pF, what cap or caps in the RIAA stage do I reduce and how do I calculate by how much?

Andrew - Why did you drop the grid leak R to 3M3 from the original 10M because the only other component you altered was the first resistor which you increased to 221k (I guess because of the 6072 rather than ECC83, and the c4s). I ask because when MJ calculates the split RIAA, the grid leak of the 2nd stage is taken into account.
Yes, the first resistor is because of the CCS and the 6072A both chaneg the Zout of the first stage.

I think there's a version of the circuit around with 3M3 in, I certainly don't recall changing it for any particular reason, sorry I can't shed any light on that one :(

If I recall Miller cap is proportional to gain. At this point LTSpice become handy.

Andrew
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